System Verilog for Verification / Spear, Chris
Tác giả : Spear, Chris
Nhà xuất bản : Springer
Năm xuất bản : 2008
Mô tả vật lý : 455 p.
Số phân loại : 621.39/2
Chủ đề : 1. Electrical Engineering ; Verilog (Computer hardware description language). 2. Electronics & Electrical Engineering. 3. Engineering. 4. Book.
Thông tin chi tiết
Tóm tắt : | Based on the bestselling first edition this extensively revised second edition includes the relevant changes that apply to the 2008 version of the SystemVerilog Language Reference Manual (LRM). Significant changes include: The revision of nearly every explanation and code sample The inclusion of new chapters: "A Complete SystemVerilog Testbench" with a complete constrained random testbench for an ATM switch and "Interfacing with C" on the DPI (Directed Programming Interface) The addition of 70 new examples including larger ones such as a directed testbench at the end of chapter four An expanded index with 50% more entries and cross references. |
Thông tin dữ liệu nguồn
Thư viện | Ký hiệu xếp giá | Dữ liệu nguồn |
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Đại học quốc gia Hà Nội |
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https://repository.vnu.edu.vn/handle/VNU_123/26210 |