
VLSI test principles and architectures : : Design for testability / Edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen
Tác giả : Edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen
Nhà xuất bản : Elsevier Morgan Kaufmann Publishers
Năm xuất bản : 2006
Nơi xuất bản : Amsterdam
Mô tả vật lý : xxx, 777 p. : ill. ; 25 cm
ISBN : 9780123705976
Số phân loại : 621.395
Chủ đề : 1. Mạch tích hợp -- Kiểm tra -- Mạch tích hợp quy mô lớn. 2. Mạch tích hợp -- Mạch tích hợp quy mô lớn -- Thiết kế. 3. Integrated circuits -- Design -- Very large scale integration. 4. Integrated circuits -- Testing -- Very large scale integration. 5. Kỹ nghệ điện tử.
Thông tin chi tiết
Tóm tắt : | This book is a fundamental VLSI Testing and Design-for-Testability (DFT) textbook allowing undergraduates, DFT practitioners, and VLSI designers to learn quickly the basic VLSI Test concepts, principles, and architectures, for test and diagnosis of digital, memory, and analog/mixed-signal designs. VLSI Testing is very basic to the semiconductor industry and is something that almost everyone in the industry needs to have some knowledge of. It is often not sufficiently covered in undergraduate curricula; therefore this book fill the gap in this area for both students and professionals in semiconductor manufacturing, design, systems, electronic design automation (EDA), etc. As 100 million transistor designs are now common, test costs are 25-40% of the overall cost of manufacturing a chip and how a chip is designed greatly impacts the cost of test. As such, it is important for designers and managers to understand the concepts and principles of testing and design-for-test techniques. |
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